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| HS-54C138RH February 1996 Radiation Hardened 3-Line to 8-Line Decoder/Demultiplexer Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW A1 B2 C3 G2A 4 G2B 5 G1 6 Y7 7 GND 8 16 VDD 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 Features * Devices QML Qualified in Accordance With MIL-PRF-38535 * Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95825 and Intersil' QM Plan * Radiation Hardened EPI-CMOS - Total Dose 1 x 105 RAD (Si) - Latch-Up Immune > 1 x 1012 RAD (Si)/s * Multiple Input Enable for Easy Expansion * Single Power Supply +5V * Outputs Active Low * Low Standby Power (0.5mW Max at +5V) * High Noise Immunity * Equivalent to Sandia SA2995 * Bus Compatible with Intersil Rad-Hard 80C85RH * Full Military Temperature Range -55oC to +125oC Description The Intersil HS-54C138RH is a radiation hardened 3- to 8-line decoder fabricated using a radiation hardened EPI-CMOS process. It features low power consumption, high noise immunity, and high speed. Also featured are pin and function compatibility with the 54LS138 industry standard part. The HS-54C138RH is ideally suited for high speed memory chip select address decoding. It is intended for use with the Intersil HS-80C85RH radiation hardened microprocessor, but it can also be utilized as a demultiplexer in any low power rad-hard application. The HS-54C138RH contains a one of eight binary decoder. A three bit binary input is used to select and activate each of the eight outputs, provided the three chip enable inputs are also present (see truth table). The HS-54C138RH has an on-chip enable gate. The active high (G1) and both active low (G2A, G2B) inputs are Anded together to provide a single enable input to the device. The use of both active high and active low inputs minimizes the need for external gates when expanding a system. 16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16 TOP VIEW A B C G2A G2B G1 Y7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD Y0 Y1 Y2 Y3 Y4 Y5 Y6 Ordering Information PART NUMBER 5962R9582501QEC 5962R9582501QXC 5962R9582501VEC 5962R9582501VXC HS1-54C138RH/SAMPLE HS9-54C138RH/SAMPLE TEMPERATURE RANGE -55oC -55oC -55oC -55oC to to to to +125oC +125oC +125oC +125oC SCREENING LEVEL MIL-PRF-38535 Level Q MIL-PRF-38535 Level Q MIL-PRF-38535 Level V MIL-PRF-38535 Level V Sample Sample PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack +25oC +25oC CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999 Spec Number File Number 1 518053 3037.2 Specifications HS-54C138RH Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V I/O Voltage Applied. . . . . . . . . . . . . . . . . . GND -0.3V to VDD +0.3V Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Reliability Information Thermal Resistance JA JC SBDIP Package . . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Voltage Range . . . . . . . . . . . . . . . . . . . +4.75V to +5.25V Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 1.0V Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . VDD-1.0V to VDD TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 7, 8A, 8B LIMITS TEMPERATURE -55oC, +25oC, +125oC -55oC, +25oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC MIN -1 4.25 0.5 MAX 1 100 UNITS A A V V A - PARAMETER Input Leakage Current High Input Leakage Current Low High Level Output Voltage Low Level Output Voltage Static Current Functional Tests SYMBOL IIH IIL VOH VOL SIDD FT CONDITIONS VDD = 5.25V, VIN = 0V, Pin Under Test = VDD VDD = 5.25V, VIN = 5.25V, Pin Under Test = 0V VDD = 4.75V, IIN = -2mA VDD = 5.25V, IIN = 2mA VDD = 5.25V, VIN = GND VDD = 5.25V and 4.75V, VIH = VDD - 1.0V, VIL = 1.0V NOTE: All devices are guaranteed at worst case limits and conditions. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS SELECT TO OUTPUT PROPAGATION DELAY TIME Low to high level input, High to low level output Low to high level input, Low to high level output High to low level input, Low to high level output High to low level input, high to low level output TPHL11 9, 10, 11 -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC 110 ns TPLH11 9, 10, 11 - 65 ns TPLH12 9, 10, 11 - 75 ns TPHL12 9, 10, 11 - 90 ns ENABLE TO OUTPUT PROPAGATION DELAY TIME Low to high level input, Low to high level output TPLH21 9, 10, 11 -55oC, +25oC, +125oC 70 ns Spec Number 2 518053 HS-54C138RH TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Low to high level input, High to low level output High to low level input, Low to high level output High to low level input, High to low level output SYMBOL TPHL21 GROUP A SUBGROUPS 9, 10, 11 TEMPERATURE -55oC, +25oC, +125oC -55oC, +25oC, +125oC -55oC, +25oC, +125oC MIN MAX 105 UNITS ns TPLH22 9, 10, 11 - 70 ns TPHL22 9, 10, 11 - 105 ns NOTE: Output timings are measured with a capacitive load, CL = 100pF, VIH = 3.75V, and VIL = 1.0V. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Input Capacitance SYMBOL CIN CONDITIONS VDD = Open, f = 1MHz, All Measurements Referenced to Device Ground VDD = Open, f = 1MHz, All Measurements Referenced to Device Ground TEMPERATURE +25oC +25oC MIN MAX 10 UNITS pF Output Capacitance COUT - 10 pF NOTE: The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design release and upon design changes which would affect these characteristics. TABLE 4. POST 100K RAD ELECTRICAL PERFORMANCE CHARACTERISTICS NOTE: The Post Irradiation test conditions and limits are the same as those listed in Table 1 and Table 2. TABLE 5. BURN-IN DELTA PARAMETERS (+25oC; In Accordance With SMD) Spec Number 3 518053 HS-54C138RH Metallization Topology DIE DIMENSIONS: 76 mils x 63 mils x 14 mils 1 mil METALLIZATION: Type: AlSi Thickness: 11kA 2kA GLASSIVATION: Type: SiO2 Thickness: 8kA 1kA Metallization Mask Layout HS-54C138RH (8) GND Y5 (10) (6) G1 (9) Y6 (7) Y7 (5) G2B Y4 (11) (4) G2A Y3 (12) (3) C Y2 (13) Y1 (14) VDD (16) A (1) Y0 (15) B (2) Spec Number 4 518053 HS-54C138RH Typical applications include systems which require multiple input/output ports and memories. When the HS-54C138RH is enabled one of the eight outputs will go low. This output can be used to select a particular device or a group of devices. The HS-54C138RH can also be cascaded to provide an enabling scheme for larger systems and allow one decoder to control eight other decoders as in Figure 1. Figure 2 shows a configuration that can be used to enable multiple I/O ports or memory devices. Up to 24 memory devices or I/O ports can be controlled using this circuit. For demultiplexer operation, one of the three enable inputs is used as the data input while the other two inputs are enable. The transmitted data is distributed to the proper output as determined by the 3-line select inputs. See Figure 3. SELECT A SELECT B ENABLE HS-54C138RH Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 TO OTHER DEVICES "1" "0" ENABLE "1" "0" ENABLE "1" "0" ENABLE HS-54C138RH Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 HS-54C138RH Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 HS-54C138RH Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 FIGURE 1 EN EN EN A4 A3 A2 A1 A0 G1 G2B G2A C B A G1 G2B G2A C B A G1 G2B G2A C B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 PORT NUMBERS OR CHIP SELECTS FIGURE 2 DATA INPUT EN EN G1 G2B G2A C SELECT B A Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 FIGURE 3 Spec Number 5 518053 HS-54C138RH All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 Spec Number 6 |
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